To satisfy customer demand for ultra-clean environments for wafer sort, CORWIL Technology (CORWIL) has added a Portable Clean Environment for wafer sort that is good to Class 1000. CORWIL’s one-stop solution from wafer sort, die prep, assembly, Package Test and Reliability provides the ability to understand how different pieces of the backend process affect each other in terms of yield.
Joe Foerstel, VP of Test for CORWIL said, “Customers have found that wafer sort in a very clean environment improves yield, especially when using certain RF probe technologies or probing devices with sensitive surface structures; particularly for our customers in the communications and medical industries.” “We have seen dramatic improvement of yields at Second Optical when customer’s wafers arrive from a cleaner environment, especially when back grind is one of the steps in the process,” added Jonny Corrao, CORWIL’s Director of Die Prep.
For more information on CORWIL’s wafer sort capabilities and the Portable clean environment please contact CORWIL 408.618.8700.
CORWIL has served the DoD, U.S. Government agencies and major prime contractors in providing state-of-the-art microelectronics packaging services with military and aerospace reliability. DMEA serves as a technology partner to military program managers and engineering liaison to all sectors of the defense contractors to provide and support the most effective microelectronics technologies available through the commercial sector.
“The Trusted Partner Accreditation is yet another key milestone in our business strategy to further our commitment in quality services and processes for the military and aerospace sector,” said Matt Bergeron, CORWIL Technology President. “CORWIL is honored to be one of the few companies offering Trusted Microelectronics Packaging, Back Grinding (Post Processing) and Assembly.”
Visit us at SMTA's Medical Electronics Symposium, September 14 & 15 at Marylhurt University in Portland, Oregon. This year's Key Note Speakers include:
- The President's Precision Medicine Initiative: The Opportunities and Challenges of Analytics on Integrated Data from One Million Patients, Bob Rogers, Intel Corporation
- Electronic Materials and Devices for Neural Applications, Mohammad Reza Abidian, Ph.D., University of Houston
- Functional Electronic Clones & China's plan to Dominate the Semiconductor-Manufacturing Industry, Tom Sharpe, SMT Corporation
Stop by the CORWIL booth and say hello and find out what CORWIL Technology can do for you!
- CORWIL can now perform ALL JESD22-A113 Precondition work IN-HOUSE, as well as
before and after CSAM with the Sonoscan D9000.
- CORWIL has taken delivery of a NEW Chroma 3650 EX Tester, 1024 channels, 96 DPS
Focused Test FTI 1000 Test System
|High Voltage Supply:||1,200V, 100mA (70VA max), (expandable to 3,600V)|
|High Power Supply:||100A pulsed, 4A continuous 55V compliance (expandable to 200A)|
|Low Leakage Measurements:||<10nA|
|Digitizer – Dual Channel:||25 MS/s|
|Quad VI Boar:||40V, 100mA|
Capable of performing package final test or wafer sort on:
Power discrete devices:
- GaN and SiC Power Transistors
- Bipolar Transistors
Intelligent Power Modules/DrMOS:
- Regulators (PWM, LDO, etc.)
- Motor/Solar Controllers
- Battery Chargers
- Drivers ( MOSFET, LED, etc.)
- Temperature Management
Analog IC devices
|We Want to Hear From You!|
Milpitas, CA, April 27, 2016 – CORWIL Technology (CORWIL) continues to demonstrate its full turnkey capabilities for its customers by adding a 3650 EX tester from Chroma ATE on their test floor.
CORWIL chose the Chroma 3650 EX tester not only for the machine’s ability to test more devices faster and provide a higher parallel test capability, but also because of the tester’s ability to offer the most cost effective solution in the industry today that CORWIL can then pass on to its customers.
“CORWIL is pleased to add the 3650 EX to our list of available test platforms. The older 3650 has proven to be a reliable platform over the last year for CORWIL customers and through our partnership with Chroma, CORWIL can now offer the 3650 EX with advanced features. This system will be a good fit to the package handler and wafer prober support that CORWIL also offers,” said Joe Foerstel, VP of Test Operations at CORWIL.
- 50 /100 MHz (2/4 edges), 200 MHz (MUX)
- 1024 digital I/O pins
- 32 MW vector memory
- PMU up to 32 CH
- 96 HDDPS
- HDADDA Option: 16 bit/500KS/s, 32 CH/Brd
- Reconfigurable SCAN Option:
- 1/2/4/8/16/32 Chains/64 pins
- 4G/2G/1G/512M/256M/128M [4G Max]
- Edge Placement Accuracy: +-300ps
- Overall timing accuracy < +-550 ps
- ALPG option for memory test
- VI45/PVI100 Analog Test Option
- MRX (Mixed Resource boX) PXI-based Option
- Up to 512 sites parallel test
- Hard Docking / Direct Probe Supported
- C/C++, Windows 7 64 bit OS
CORWIL TECHNOLOGY RECEIVES A PERFECT SCORECARD FROM DEVICE ENGINEERING INCORPORATED
Milpitas, CA, March 16, 2016 – CORWIL Technology (CORWIL), the premier US/Silicon Valley based, IC assembly and test services subcontractor, offering full back-end assembly services starting from wafer sort, thinning and dicing through die-attach, wirebond, package sealing and final test, was awarded a 100% satisfaction Supplier Scorecard from Device Engineering Incorporated (DEI).
“We would like to thank CORWIL Technology for all the hard work they have done for Device Engineering Inc (DEI). At DEI we are committed to provide our suppliers and customers with Service with Excellence. CORWIL plays an important role in helping us achieve that by providing deliveries on time, and high quality products or services,” stated Matt Walker, Device Engineering Incorporated Production Manager.
The Supplier Scorecard is produced semiannually to rate a supplier’s capability to provide on time delivery as well as their ability to offer high quality products and services. “CORWIL understands the importance of quality and on-time delivery for our Military and Aerospace oriented customers like DEI,” said Matt Bergeron, CORWIL Technology’s President.
About CORWIL Technology Corporation
CORWIL Technology provides high quality and responsive semiconductor assembly and test services focusing on Hi-Rel, fast-turn and wafer processing markets. Founded in 1990 and based in Milpitas, CA, CORWIL is the premier U.S. provider of full back-end assembly services and is a key partner with leading medical, Mil/Aero and commercial semiconductor companies.
For more information about CORWIL, please visit www.corwil.com.
About Device Engineering, Inc.
Device Engineering Inc (DEI) is a fabless semiconductor manufacturer that supplies a portfolio of standard products targeted primarily toward avionics including transceivers/receivers/drivers for Arinc 429 and other communications protocols; discrete/digital converters; and other general purpose components. DEI also supplies a select offering of mixed-signal ASICs and analog arrays, specializing in hard-to-find technologies like high voltage; trailing edge/ obsolete replacement; RF; stitched reticle and voltage transient immunity. Markets served are primarily Mil/Aero, Commercial Aerospace, Medical and high-end Industrial.
CORWIL Technology successfully processes a number of materials through its wafer processing facility. While Silicon is the majority of material processed we’ve been seeing increasing trends in such materials as SiGe and GaN, as well as GaAs and InP. Each material, wafer size, and customer specification requires attention to detail and careful recipe cultivation, as well as specialized grinding and cutting tools. CORWIL’s standardization on DISCO equipment has allowed us to work closely with our vendors and be able to process multiple materials on different machines.
Backgrinding: CORWIL uses automated and semi-automated Disco equipment and grind wheels to process wafers. Speeds, grind wheel grits, and selection of appropriate WSS (wafer support system) tapes all play a role in processing exotic materials. Through repeated process verification activities, we select grind wheels and parameters that are suitable for each wafer’s specific characteristics resulting in the optimal grind conditions.
Optimal grinding conditions enable low-load grinding for both coarse and fine grinding by decelerating the feed speed of the grinding wheel spindle as the final finishing thickness is approached. Further, applications such as accelerating at the wafer vacuum table while decelerating the spindle rotation speed are effective as countermeasures to reduce edge chipping.
The following are some considerations when backgrinding some different materials:
- Grinding of GaAs (Gallium Arsenide) wafers tends to cause plucking (holes made by peeling) or scratching on the surface. In addition, depending on the difference of the wafer manufacturing process, the process ability of the GaAs wafers varies.
- SiC (Silicon Carbide) is a very hard material and extremely difficult to grind. Process time is much slower compared to Si. Using Disco’s GS08 series grind wheel, high quality SiC processing is possible for this extremely hard material. .
- InP (Indium Phosphide) Optimization of wheels and processing parameters enables high quality processing of InP used in high-speed devices. Selection of optimal processing parameters improves the condition of the processed surface compared with the traditional methods.
- Grinding of BSM (Backside Metallization) Au (gold), Ag (silver) and other exotic metals can be removed from the backside of wafers by utilizing special Disco grind wheels coupled with optimum grinding parameters and interval dressing.
The following pictures are special III-V backgrinding processes developed by CORWIL. GaAs and InP wafer diameters ranging from 3-8 inch mounted on WSS tape or sapphire carriers can be thinned to 100µ or less succesfully.
6-inch GaAs wafer mesa etched before grind, process development for ultra stable laser optics by Crystalline Mirror Solutions
GaAs mesa singulation after grind, in this case up to ~50-mm diameter die generated via an "etch-to-core" process
GaAs wafer portions mounted on sapphire
GaAs wafers thinned on sapphire carriers
100mm GaAs wafers thinned on sapphire
InP devices mounted and thinned on handle
InP wafers mounted on WSS backgrind tape
InP wafers “gang” mounted and thinned
Dicing: Dicing saws use dicing blades to cut silicon, glass, and ceramic work pieces with a high degree of accuracy. Fully automatic dicing saws perform the entire process sequence: loading from the cassette, alignment, dicing, cleaning/drying, and unloading to the cassette, in a completely automated fashion. CORWIL utilizes different dicing blades and saws as well as advanced recipe development to successfully dice silicon, III-V materials and other exotic materials such as Sapphire.
Backside chipping caused during the dicing process tends to increase on exotic materials and thin wafers. Finer grit blades and the use of surfactant lubricity can reduce backside chipping. In general, a finer-grit blade imparts less of a shock to the work piece, thereby reducing backside chipping. DISCO's dicing blades are used with dicing and cutting saws to groove, cut, and dice silicon, compound semiconductors, glass, ceramics, crystals, and almost any other material. They are one key to DISCO's excellence in Kiru (dicing) processing
The following are some considerations when dicing different materials:
- Dicing SiGe: While very similar to dicing Silicon, Silicon Germanium wafers have a number of nuances that call for careful development of dicing recipes and use of alternative blades. We see increasing use of SiGe by our customers and have developed techniques to enhance edge quality of dice.
- Dicing GaAs - During dicing, breakage and cracking can easily occur in the GaAs wafer because the material is very brittle. A combination of an ultra-thin diamond blade and an aluminum hub provides enhanced operation efficiency and stable cutting results. In combination with DISCO's vast application knowledge, these blades provide excellent cutting results when dicing silicon wafers and compound semiconductor wafers such as GaAs.
- Dice before Grind – DBG: CORWIL has successfully processed a number of different materials using the DBG process including SiGe and GaAs. DBG reverses the usual process of fully dicing the wafer after grinding. In DBG, the wafer is first trenched, or partial-cut, to a depth greater than the final target thickness. The wafer is then thinned to the final target resulting in die separation. After grind, the wafer goes to the in-line DBG Mounter, which mounts the wafer and gently peels off the protective grinding tape, completing the process.
Because the die are singulated at the final target thickness, wafer-level breakage is greatly reduced. Additionally, as a result of the die separation occurring during the grinding process, the backside chipping associated with thin-wafer dicing is kept to a minimum. DBG can also provide improved die strength depending on the application. For these reasons, DBG is an excellent process for processing wafers with high-quality backside requirements.
Scribe and Break: CORWIL also processes die using scribe and break technology. This type of technology works well with brittle materials such as Indium Phosphide and GaAs.
The following is an overview of our guidelines for our scribe and break process:
Some Caveats of our guidelines:
- Thicknesses greater than the specified optimal conditions will be evaluated by CORWIL Engineering
- Street widths narrower than specified will be evaluated by CORWIL Engineering
- Maximum wafer size is 5”
- Irregular shapes and wafer fragments and portions can be processed.
CORWIL Technology uses world class equipment and processes to process Silicon, III-V and other exotic materials. CORWIL’s work with Disco, our customers, and a long history of recipe development through Design of Experiments ensures our customers’ continued satisfaction by consistently providing high-quality results.
For more information on this or any of CORWIL's other services please give us a call at 408-618-8700 or fill out our Quote Request Form.
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CORWIL Technology Receives Excellent Performance Report Card from Microsemi Corporation
Milpitas, CA July 21, 2015 - CORWIL Technology (CORWIL), the premier US based, IC assembly and test services subcontractor, has been given an ‘exceptional performance’ rating from Microsemi Corporation (Nasdaq: MSCC) on their Quarterly Performance Report Card for Q3 2015 and for the prior year.
Microsemi uses a supplier performance measurement system based on Quality and On Time Delivery in order to improve the performance and relationships with their suppiers. “CORWIL Technology is one of the key suppiers chosen for inclusion in this communication based upon the importance of their products to our mutual success,” stated Michael Nordenstrom, Microsemi’s Supplier Quality Engineer.
As a global provider of advanced embedded components for defense markets and applications including extended environment operational requirements, Microsemi PMG, dba White Electronic Designs Corporation, is Defense Microelectronics Activity (DMEA) accredited.
“We’re pleased to be partnered with Microsemi’s PMG division and happy that we are able to excel at their stringent requirements for their Mil/Aero customers.” said Matt Bergeron, President of CORWIL.
About CORWIL Technology Corporation
CORWIL Technology provides high quality and responsive semiconductor assembly and test services focusing on Hi-Rel, fast-turn and wafer processing markets. Founded in 1990 and based in Milpitas, CA, CORWIL is the premier U.S. provider of full back-end assembly services and is a key partner with leading medical, Mil/Aero and commercial semiconductor companies. For more information about CORWIL, please visitwww.corwil.com.
Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for communications, defense & security, aerospace and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world's standard for time; voice processing devices; RF solutions; discrete components; security technologies and scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, Calif, and has approximately 3,600 employees globally. Learn more atwww.microsemi.com.